Charged particle beam apparatus are typically employed in scanning electron microscopy (SEM), which is a known technique used in semiconductor manufacturing. Traditionally, the wafer edge has been of secondary concern to semiconductor manufacturers, since it was considered a non-active area. However, there is a growing industry awareness that wafer edge and backside conditions impact yields, directly and indirectly. A 300 mm wafer may contain as much as 25% of the devices at its outer edge, and a recently published benchmark study has demonstrated that yield can decrease by as much as 50% at the wafer's edge. While there are varying causes for this yield loss, chipmakers are increasingly aware of the need to manage defect source at the wafer's edge. For instance, a scratch on the bottom of a wafer can cause a hot spot on the top. A large scratch or residual slurry on the bevel can flake or peel off, depositing particles on the topside that cause defects.
In addition to affecting yield, defects may adversely impact the availability of the lithography equipment. The need for well characterized and methodical edge and bevel defect control becomes even greater with the introduction of immersion lithography for 45 nm technology node. Immersion increases the need for tighter edge control because of new edge defect creation mechanisms and because of higher risk of edge defects migrating to wafer patterned area with immersion liquid flow. The immersion fluid may pick up and deposit particles from the bevel region onto the wafer.
Defects sources impacting yield include traditional films (silicon oxide, silicon nitride and polymers), new materials such as porous low-k and organic films. Porous low-k film often does not adhere as well as traditional silicon- or polymer-based films and, therefore, can be significant defect sources. Tensile films such as amorphous carbon also may adhere poorly at the edge of the wafer and can peel off in long strips that tend to ball up, creating particle sources.
Although edge and bevel defects are typically large (several microns and above) and can be detected by optical microscope, comprehensive analysis of these defects requires the high resolution and image contrast provided by SEM. Optically, many of the defects appear as a small spot, whereas the SEM image reveals their true morphology. Understanding the defect's elemental composition can provide many clues to its origin and cause. Therefore, the ability to analyze the defect material has tremendous added value.
A system and method in accordance with the present invention addresses defect and inspection review in an effective manner in a wafer edge.